-------------------------------------------------------------------------------
-- regfile_ent.vhd
-------------------------------------------------------------------------------
--
-- This file is part of SKUMLI.
-- Copyright (C) 2011 Davide Giuseppe Monaco (black.ralkass@gmail.com)
--
-- SKUMLI is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- SKUMLI is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with SKUMLI.  If not, see <http://www.gnu.org/licenses/>.
--
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-------------------------------------------------------------------------------
entity regfile is

  generic (
    N : integer := 32;
    M : integer := 5
  );

  port (
    -- control
    clk   : in  std_logic; -- ADD CLOCK JUST FOR WRITE, READ IS FREE
    rst   : in  std_logic;
    we    : in  std_logic;

    -- input
    s     : in  std_logic_vector(M - 1 downto 0);
    t     : in  std_logic_vector(M - 1 downto 0);
    d     : in  std_logic_vector(M - 1 downto 0);
    din   : in  std_logic_vector(N - 1 downto 0);

    -- input
    dout0 : out std_logic_vector(N - 1 downto 0);
    dout1 : out std_logic_vector(N - 1 downto 0)
  );

end regfile;
